Physical Design Trained Engineer Internship in Noida

Job Description Qualifications: B.Tech/B.E/M.E/M.TechJob Location - PAN INDIAPreferred only those who have done Training or internship in Physical Design.Job DescriptionPhysical Design Planning: Collaborate with chip architects and logic designers to understand the design goals, constraints, and specifications. Develop a physical design plan that outlines the steps and resources needed for successful implementation.Floor planning: Create a floorplan that defines the placement of different functional blocks and components on the semiconductor die to optimize power, performance, and area (PPA).Placement: Place and optimize logic cells, memory elements, and other IP blocks on the chip according to the floorplan. Balance trade-offs between area, timing, and power consumption.Clock Tree Synthesis (CTS): Design and implement clock distribution networks to ensure synchronized clock signals throughout the chip, minimizing clock skew and jitter.Routing: Perform global and detailed routing to connect all the components on the chip while adhering to design rules and manufacturability constraints. Timing Closure: Use static timing analysis tools to meet timing requirements and ensure the chip operates at the desired clock frequency.Power Optimization: Implement low-power design techniques, such as power gating, voltage scaling, and clock gating, to reduce power consumption while maintaining performancePhysical Verification: Run design rule checking (DRC) and layout versus schematic (LVS) checks to ensure the layout meets manufacturing and electrical integrity standards.Design for Manufacturing (DFM): Collaborate with manufacturing teams to optimize the design for the fabrication process, considering issues like lithography, yield, and process variations.Tape-out: Prepare the final design for fabrication by generating the required files and documentation. Coordinate with foundries for tape-out.Post-Silicon Validation Support: Assist in post-silicon bring-up and debugging, if necessary, to ensure the chip performs as expected.Documentation: Maintain detailed documentation of the design process, methodologies, and any issues encountered for future reference.Skills: physical design,static timing analysis,very-large-scale integration (vlsi)